View 24C02N_4127052.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1 features ? low-voltage and standard-voltage operation ? 2.7 (v cc = 2.7v to 5.5v) ? 1.8 (v cc = 1.8v to 5.5v) ? internally organized 128 x 8 (1k), 256 x 8 (2k), 512 x 8 (4k), 1024 x 8 (8k) or 2048 x 8 (16k) ? two-wire serial interface ? schmitt trigger, filtered inputs for noise suppression ? bidirectional data transfer protocol ? 100 khz (1.8v) and 400 khz (2.7v, 5v) compatibility ? write protect pin for hardware data protection ? 8-byte page (1k, 2k), 16-byte page (4k, 8k, 16k) write modes ? partial page writes allowed ? self-timed write cycle (5 ms max) ? high-reliability ? endurance: 1 million write cycles ? data retention: 100 years ? automotive devices available ? 8-lead jedec pdip, 8-lead jedec soic, 8-l ead ultra thin mini-m ap (mlp 2x3), 5-lead sot23, 8-lead tssop and 8-ball dbga2 packages ? die sales: wafer form, waffle pack and bumped wafers description the at24c01a/02/04/08a/16a provides 1024/2048/4096/8192/16384 bits of serial electrically erasable and programmable read-only memory (eeprom) organized as 128/256/512/1024/2048 words of 8 bits each. the device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. the at24c01a/02/04/08a/16a is available in space-saving 8-lead pdip, 8-lead jedec soic, 8-lead ultra thin mini-map (mlp 2x3) , 5-lead sot23 (at24c01a/at24c02/at24c04), 8-lead tssop, and 8-ball dbga2 packages and is accessed via a two-wire serial interface. in addition, the entire fa mily is available in 2.7v (2.7v to 5.5v) and 1.8v (1.8v to 5.5v) versions. table 1. pin configuration pin name function a0 - a2 address inputs sda serial data scl serial clock input wp write protect nc no connect gnd ground vcc power supply two-wire serial eeprom 1k (128 x 8) 2k (256 x 8) 4k (512 x 8) 8k (1024 x 8) 16k (2048 x 8) at24c01a (1) at24c02 (2) at24c04 at24c08a at24c16a (3) 0180z?seepr?11/06 notes: 1. not recommended for new design; please refer to at24c01b datasheet. 2. not recommended for new design; please refer to at24c02b datasheet. 3. not recommended for new design; please refer to at24c16b datasheet 8-lead soic 1 2 3 4 8 7 6 5 a0 a1 a2 gnd vcc wp scl sda 8-lead pdip 1 2 3 4 8 7 6 5 a0 a1 a2 gnd vcc wp scl sda 8-lead ultra thin mini-map (mlp 2x3) bottom view 1 2 3 4 8 7 6 5 v cc wp scl s da a0 a1 a2 gn d 5-lead sot23 1 2 3 5 4 scl g nd sda wp vcc 8-ball dbga2 bottom view vcc wp scl sda a0 a1 a2 gnd 1 2 3 4 8 7 6 5 8-lead tssop 1 2 3 4 8 7 6 5 a0 a1 a2 g nd vc c wp sc l sd a
2 at24c01a/02/04/08a/16a 0180z?seepr?11/06 figure 1. block diagram absolute maximum ratings operating temperature..................................?55 c to +125 c *notice: stresses beyond those listed under ?absolute maximum ratings? may cause permanent dam- age to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of th is specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. storage temperature .....................................?65 c to +150 c voltage on any pin with respect to ground .................................... ?1.0v to +7.0v maximum operating voltage .......................................... 6.25v dc output current........................................................ 5.0 ma
3 at24c01a/02/04/08a/16a 0180z?seepr?11/06 pin description serial clock (scl): the scl input is used to positive edge clock data into each eeprom device and negat ive edge clock data out of each device. serial data (sda): the sda pin is bidirectional for serial data transfer. this pin is open-drain driven and may be wire-ored with any number of other open-drain or open- collector devices. device/page addresses (a2, a1, a0): the a2, a1 and a0 pins are device address inputs that are hard wired for the at24c01a and the at24c02. as many as eight 1k/2k devices may be addressed on a single bus system (device addressing is discussed in detail under the device addressing section). the at24c04 uses the a2 and a1 inputs for hard wire addressing and a total of four 4k devices may be addressed on a single bus system. the a0 pin is a no connect and can be connected to ground. the at24c08a only uses the a2 input for hardwire addressing and a total of two 8k devices may be addressed on a single bus system. the a0 and a1 pins are no connects and can be connected to ground. the at24c16a does not use the device address pins, which limits the number of devices on a single bus to one. the a0, a1 and a2 pins are no connects and can be connected to ground. write protect (wp): the at24c01a/02/04/08a/16a has a write protect pin that provides hardware data protection. the write protect pin allows normal read/write operations when connected to ground (gnd). when the write protect pin is connected to v cc , the write protection feature is enabl ed and operates as shown in table 2. table 2. write protect memory organization at24c01a, 1k serial eeprom: internally organized with 16 pages of 8 bytes each, the 1k requires a 7-bit data word address for random word addressing. at24c02, 2k serial eeprom: internally organized with 32 pages of 8 bytes each, the 2k requires an 8-bit data word address for random word addressing. at24c04, 4k serial eeprom: internally organized with 32 pages of 16 bytes each, the 4k requires a 9-bit data word address for random word addressing. at24c08a, 8k serial eeprom: internally organized with 64 pages of 16 bytes each, the 8k requires a 10-bit data word address for random word addressing. at24c16a, 16k serial eeprom: internally organized with 128 pages of 16 bytes each, the 16k requires an 11-bit data word address for random word addressing. wp pin status part of the array protected 24c01a 24c02 24c04 24c08a 24c16a at v cc full (1k) array full (2k) array full (4k) array full (8k) array full (16k) array at gnd normal read/write operations
4 at24c01a/02/04/08a/16a 0180z?seepr?11/06 note: 1. this parameter is characterized and is not 100% tested. note: 1. v il min and v ih max are reference only and are not tested. table 3. pin capacitance (1) applicable over recommended operating range from t a = 25 c, f = 1.0 mhz, v cc = +1.8v symbol test condition max units conditions c i/o input/output capacitance (sda) 8 pf v i/o = 0v c in input capacitance (a 0 , a 1 , a 2 , scl) 6 pf v in = 0v table 4. dc characteristics applicable over recommended operating range from: t ai = ? 40 c to +85 c, v cc = +1.8v to +5.5v, v cc = +1.8v to +5.5v (unless otherwise noted) symbol parameter test condition min typ max units v cc1 supply voltage 1.8 5.5 v v cc2 supply voltage 2.7 5.5 v v cc3 supply voltage 4.5 5.5 v i cc supply current v cc = 5.0v read at 100 khz 0.4 1.0 ma i cc supply current v cc = 5.0v write at 100 khz 2.0 3.0 ma i sb1 standby current v cc = 1.8v v in = v cc or v ss 0.6 3.0 a i sb2 standby current v cc = 2.5v v in = v cc or v ss 1.4 4.0 a i sb3 standby current v cc = 2.7v v in = v cc or v ss 1.6 4.0 a i sb4 standby current v cc = 5.0v v in = v cc or v ss 8.0 18.0 a i li input leakage current v in = v cc or v ss 0.10 3.0 a i lo output leakage current v out = v cc or v ss 0.05 3.0 a v il input low level (1) ?0.6 v cc x 0.3 v v ih input high level (1) v cc x 0.7 v cc + 0.5 v v ol2 output low level v cc = 3.0v i ol = 2.1 ma 0.4 v v ol1 output low level v cc = 1.8v i ol = 0.15 ma 0.2 v
5 at24c01a/02/04/08a/16a 0180z?seepr?11/06 note: 1. this parameter is characterized. table 5. ac characteristics applicable over recommended operating range from t ai = ? 40 c to +85 c, v cc = +1.8v to +5.5v, v cc = +2.7v to +5.5v, cl = 1 ttl gate and 100 pf (unless otherwise noted) symbol parameter 1.8-volt 2.7, 5.0-volt units min max min max f scl clock frequency, scl 100 400 khz t low clock pulse width low 4.7 1.2 s t high clock pulse width high 4.0 0.6 s t i noise suppression time (1) 100 50 ns t aa clock low to data out valid 0.1 4.5 0.1 0.9 s t buf time the bus must be free before a new transmission can start (1) 4.7 1.2 s t hd.sta start hold time 4.0 0.6 s t su.sta start setup time 4.7 0.6 s t hd.dat data in hold time 0 0 s t su.dat data in setup time 200 100 ns t r inputs rise time (1) 1.0 0.3 s t f inputs fall time (1) 300 300 ns t su.sto stop setup time 4.7 0.6 s t dh data out hold time 100 50 ns t wr write cycle time 5 5 ms endurance (1) 5.0v, 25 c, byte mode 1m 1m write cycles
6 at24c01a/02/04/08a/16a 0180z?seepr?11/06 device operation clock and data transitions: the sda pin is normally pulled high with an exter- nal device. data on the sda pin may change only during scl low time periods (see figure 4 on page 7). data c hanges during scl high periods will indicate a start or stop condition as defined below. start condition: a high-to-low transition of sda with scl high is a start condition which must precede any other command (see figure 5 on page 8). stop condition: a low-to-high transition of sda wit h scl high is a stop condition. after a read sequence, the stop command will place th e eeprom in a standby power mode (see figure 5 on page 8). acknowledge: all addresses and data words are serially transmitted to and from the eeprom in 8-bit words. the eeprom sends a zero to acknowledge that it has received each word. this happens during the ninth clock cycle. standby mode: the at24c01a/02/04/08a/16a feat ures a low-power standby mode which is enabled: (a) upon power-up and (b) after the receipt of the stop bit and the completion of any internal operations. memory reset: after an interruption in protocol, power loss or system reset, any 2- wire part can be reset by following these steps: 1. clock up to 9 cycles. 2. look for sda high in each cycle while scl is high. 3. create a start condition.
7 at24c01a/02/04/08a/16a 0180z?seepr?11/06 bus timing figure 2. scl: serial clock, sda: serial data i/o ? write cycle timing figure 3. scl: serial clock, sda: serial data i/o note: 1. the writ e cycle time t wr is the time from a valid stop condition of a writ e sequence to the end of the internal clear/write cycle. figure 4. data validity t wr (1) stop condition start condition wordn ack 8th bit s cl s da
8 at24c01a/02/04/08a/16a 0180z?seepr?11/06 figure 5. start and stop definition figure 6. output acknowledge
9 at24c01a/02/04/08a/16a 0180z?seepr?11/06 device addressing the 1k, 2k, 4k, 8k and 16k eeprom devices all require an 8-bit device address word following a start condition to enable the chip fo r a read or write operation (refer to figure 7). the device address word consists of a mandatory one, zero sequence for the first four most significant bits as shown. this is common to all the eeprom devices. the next 3 bits are the a2 , a1 and a0 device address bits for the 1k/2k eeprom. these 3 bits must compare to their corresponding hard-wired input pins. the 4k eeprom only uses the a2 and a1 device add ress bits with the third bit being a memory page address bit. the two device address bits must compare to their corre- sponding hard-wired input pins . the a0 pin is no connect. the 8k eeprom only uses the a2 device address bit with the next 2 bits being for memory page addressing. the a2 bit must compare to its corresponding hard-wired input pin. the a1 and a0 pins are no connect. the 16k does not use any device address bi ts but instead the 3 bits are used for mem- ory page addressing. these page addressing bits on the 4k, 8k and 16k devices should be considered the most significant bits of the data word address which follows. the a0, a1 and a2 pins are no connect. the eighth bit of the device address is the r ead/write operation select bit. a read opera- tion is initiated if this bit is high and a writ e operation is initiate d if this bit is low. upon a compare of the device address, the eeprom will output a ze ro. if a compare is not made, the chip will return to a standby state. write operations byte write: a write operation requires an 8-bit data word address following the device address word and acknowledgment. upon receipt of this address, the eeprom will again respond with a zero and then cloc k in the first 8-bit data word. following receipt of the 8-bit data word, the ee prom will output a zero and the addressing device, such as a microcontroller, must te rminate the write sequence with a stop condi- tion. at this time the eeprom enters an internally timed write cycle, t wr , to the nonvolatile memory. all inputs are disabled during this write cycle and the eeprom will not respond until the write is complete (see figure 8 on page 11). page write: the 1k/2k eeprom is capa ble of an 8-byte page write, and the 4k, 8k and 16k devices are capable of 16-byte page writes. a page write is initiated the same as a byte write, but the microcontroller does not send a stop condition after the fi rst data word is clocked in. instead, after the eeprom acknowledges receipt of the first data word, the microcontroller can transmit up to seven (1k/2k) or fifteen (4k, 8k, 16k) more da ta words. the eeprom will respond with a zero after each data word received. the microcontroller must terminate the page write sequence with a stop condition (see figure 9 on page 11). the data word address lower three (1k/2k) or four (4k, 8k, 16k) bits are internally incremented following the receipt of each data word. the higher data word address bits are not incremented, retaining the memory page row location. when the word address, internally generated, reaches the page bounda ry, the following byte is placed at the beginning of the same page. if more than eight (1k/2k) or sixteen (4k, 8k, 16k) data words are transmitted to the eeprom, the da ta word address will ?roll over? and previ- ous data will be overwritten.
10 at24c01a/02/04/08a/16a 0180z?seepr?11/06 acknowledge polling: once the internally timed write cycle has started and the eeprom inputs are disabled, acknowledge polling c an be initiated. this involves sending a start condition followed by the device address word. the read/write bit is representative of the operation desired. only if t he internal write cycle has co mpleted will the eeprom respond with a zero allowing the read or write sequence to continue. read operations read operations are initiated the same way as write operations with th e exception that the read/write select bit in the device address word is set to one. there are three read operations: current address read, random address read and sequential read. current address read: the internal data word addr ess counter maintains the last address accessed during the last read or write operation, incremented by one. this address stays valid between operations as long as the chip power is maintained. the address ?roll over? during read is from the last byte of the la st memory page to the first byte of the first page. the address ?roll over? during write is from the la st byte of the current page to the first byte of the same page. once the device address with the read/write sele ct bit set to one is clocked in and acknowl- edged by the eeprom, the curr ent address data word is se rially clocked out. the microcontroller does not respond with an input zero but does generate a following stop condi- tion (see figure 10 on page 12). random read: a random read requires a ?dummy? byte write sequence to load in the data word address. once the device address wo rd and data word address are clocked in and acknowledged by the eeprom, the microcontr oller must generate another start condition. the microcontroller now initiates a current address read by sending a device address with the read/write select bit high. th e eeprom acknowledges the device address and serially clocks out the data word. the microcontroller does not respond with a zero but does generate a fol- lowing stop condition (see figure 11 on page 12). sequential read: sequential reads are initiated by either a current address read or a ran- dom address read. after the microcontroller receives a data word, it responds with an acknowledge. as long as the eepr om receives an ackn owledge, it will cont inue to increment the data word address and serially clock out sequential data words. when the memory address limit is reache d, the data word address will ?roll over? and the sequential read will con- tinue. the sequential read operation is terminated when the microcontroller does not respond with a zero but does generate a following stop condition (see figure 12 on page 12).
11 at24c01a/02/04/08a/16a 0180z?seepr?11/06 figure 7. device address figure 8. byte write figure 9. page write (* = don?t care bit for 1k) 8k 16k msb
12 at24c01a/02/04/08a/16a 0180z?seepr?11/06 figure 10. current address read figure 11. random read (* = don?t care bit for 1k) figure 12. sequential read
13 at24c01a/02/04/08a/16a 0180z?seepr?11/06 notes: 1. this device is not recommended for new design. please refe r to at24c01b datasheet. for 2.7v devices used in the 4.5v to 5.5v range, please refer to performance values in the ac and dc characteristics table. 2. ?u? designates green package + rohs compliant. 3. ?h? designates green package + rohs compliant, with nipdau lead finish. 4. available in waffle pack and wafer form; order as sl788 for inkless wafer form. bumped die available upon request. please contact serial eeprom marketing. at24c01a ordering information (1) ordering code package operation range at24c01a-10pu-2.7 (2) at24c01a-10pu-1.8 (2) at24c01a-10su-2.7 (2) at24c01a-10su-1.8 (2) at24c01a-10tu-2.7 (2) at24c01a-10tu-1.8 (2) at24c01a-10tsu-1.8 (2) at24c01au3-10uu-1.8 (2) at24c01ay1-10yu-1.8 (2) (not recommended for new design) at24c01ay6-10yh-1.8 (3) 8p3 8p3 8s1 8s1 8a2 8a2 5ts1 8u31 8y1 8y6 lead-free/halogen-free/ industrial temperature (?40 c to 85 c) at24c01a-w1.8-11 (4) die sale industrial temperature (?40 c to 85 c) package type 8p3 8-lead, 0.300" wide, plastic dual inline package (pdip) 8s1 8-lead, 0.150" wide, plastic gull wing small outline (jedec soic) 8a2 8-lead, 4.4 mm body, plastic thin shrink small outline package (tssop) 8y1 8-lead, 4.90 mm x 3.00 mm body, dual footprin t, non-leaded, miniature array package (map) 8y6 8-lead, 2.00 x 3.00 mm body, 0.50 mm pitch, ultra thin mini-map, dual no lead package (dfn), (mlp 2x3 mm) 5ts1 5-lead, 2.90 mm x 1.60 mm body, plastic thin shrink small outline package (sot23) 8u3-1 8-ball, die ball grid away package (dbga2) options ? 2.7 low-voltage (2.7v to 5.5v) ? 1.8 low-voltage (1.8v to 5.5v)
14 at24c01a/02/04/08a/16a 0180z?seepr?11/06 notes: 1. this device is not recommended for new design. please refe r to at24c02b datasheet. for 2.7v devices used in the 4.5v to 5.5v range, please refer to performance values in the ac and dc characteristics table. 2. ?u? designates green package + rohs compliant. 3. available in waffle pack and wafer form; order as sl719 fo r wafer form. bumped die available upon request. please contact serial eeprom marketing. at24c02 ordering information (1) ordering code package operation range at24c02-10pu-2.7 (2) at24c02-10pu-1.8 (2) at24C02N-10su-2.7 (2) at24C02N-10su-1.8 (2) at24c02-10tu-2.7 (2) at24c02-10tu-1.8 (2) at24c02y1-10yu-1.8 (2) at24c02-10tsu-1.8 (2) at24c02u3-10uu-1.8 (2) 8p3 8p3 8s1 8s1 8a2 8a2 8y1 5ts1 8u3-1 lead-free/halogen-free/ industrial temperature (?40 c to 85 c) at24c02-w2.7-11 (3) die sale industrial temperature (?40 c to 85 c) package type 8p3 8-lead, 0.300" wide, plastic dual inline package (pdip) 8s1 8-lead, 0.150" wide, plastic gull wing small outline (jedec soic) 8a2 8-lead, 4.4 mm body, plastic thin shrink small outline package (tssop) 8y1 8-lead, 4.90 mm x 3.00 mm body, dual footprin t, non-leaded, miniature array package (map) 5ts1 5-lead, 2.90 mm x 1.60 mm body, plastic thin shrink small outline package (sot23) 8u3-1 8-ball, die ball grid away package (dbga2) options ? 2.7 low-voltage (2.7v to 5.5v) ? 1.8 low-voltage (1.8v to 5.5v)
15 at24c01a/02/04/08a/16a 0180z?seepr?11/06 notes: 1. for 2.7v devices used in the 4.5v to 5.5v range, please refer to performance values in the ac and dc characteristics ta ble. 2. ?u? designates green package + rohs compliant. 3. ?h? designates green package + rohs compliant, with nipdau lead finish. 4. available in waffle pack and wafer form; order as sl788 for inkless wafer form. bumped die available upon request. please contact serial eeprom marketing. at24c04 ordering information (1) ordering code package operation range at24c04-10pu-2.7 (2) at24c04-10pu-1.8 (2) at24c04n-10su-2.7 (2) at24c04n-10su-1.8 (2) at24c04-10tu-2.7 (2) at24c04-10tu-1.8 (2) at24c04y1-10yu-1.8 (2) (not recommended for new design) at24c04y6-10yh-1.8 (3) at24c04-10tsu-1.8 (2) at24c04u3-10uu-1.8 (2) 8p3 8p3 8s1 8s1 8a2 8a2 8y1 8y6 5ts1 8u3-1 lead-free/halogen-free/ industrial temperature (?40 c to 85 c) at24c04-w1.8-11 (4) die sale industrial temperature (?40 c to 85 c) package type 8p3 8-lead, 0.300" wide, plastic dual inline package (pdip) 8s1 8-lead, 0.150" wide, plastic gull wing small outline (jedec soic) 8a2 8-lead, 4.4 mm body, plastic thin shrink small outline package (tssop) 8y1 8-lead, 4.90 mm x 3.00 mm body, dual footprin t, non-leaded, miniature array package (map) 8y6 8-lead, 2.00 x 3.00 mm body, 0.50 mm pitch, ultra thin mini-map, dual no lead package (dfn), (mlp 2x3 mm) 5ts1 5-lead, 2.90 mm x 1.60 mm body, plastic thin shrink small outline package (sot23) 8u3-1 8-ball, die ball grid away package (dbga2) options ? 2.7 low-voltage (2.7v to 5.5v) ? 1.8 low-voltage (1.8v to 5.5v)
16 at24c01a/02/04/08a/16a 0180z?seepr?11/06 notes: 1. for 2.7v devices used in the 4.5v to 5.5v range, please refer to performance values in the ac and dc characteristics ta ble. 2. ?u? designates green package + rohs compliant. 3. ?h? designates green package + rohs compliant, with nipdau lead finish. 4. available in waffle pack and wafer form; order as sl788 for inkless wafer form. bumped die available upon request. please contact serial eeprom marketing. at24c08a ordering information (1) ordering code package operation range at24c08a-10pu-2.7 (2) at24c08a-10pu-1.8 (2) at24c08an-10su-2.7 (2) at24c08an-10su-1.8 (2) at24c08a-10tu-2.7 (2) at24c08a-10tu-1.8 (2) at24c08ay1-10yu-1.8 (2) (not recommended for new design) at24c08ay6-10yh-1.8 (3) at24c08au2-10uu-1.8 (2 8p3 8p3 8s1 8s1 8a2 8a2 8y1 8y6 8u2-1 lead-free/halogen-free/ industrial temperature ( ? 40 c to 85 c) at24c08a-w1.8-11 (4) die sale industrial temperature (?40 c to 85 c) package type 8p3 8-pin, 0.300" wide, plastic dual inline package (pdip) 8s1 8-lead, 0.150" wide, plastic gull wing small outline (jedec soic) 8a2 8-lead, 4.4 mm body, plastic thin shrink small outline package (tssop) 8y1 8-lead, 4.90 mm x 3.00 mm body, dual footprin t, non-leaded, miniature array package (map) 8y6 8-lead, 2.00 x 3.00 mm body, 0.50 mm pitch, ultra thin mini-map, dual no lead package (dfn), (mlp 2x3 mm) 8u2-1 8-ball, die ball grid array package (dbga2) options ? 2.7 low voltage (2.7v to 5.5v) ? 1.8 low voltage (1.8v to 5.5v)
17 at24c01a/02/04/08a/16a 0180z?seepr?11/06 notes: 1. this device is not recommended for new design. please refe r to at24c16b datasheet. for 2.7v devices used in the 4.5v to 5.5v range, please refer to performance values in the ac and dc characteristics table. 2. ?u? designates green package + rohs compliant. 3. ?h? designates green package + rohs compliant, with nipdau lead finish. 4. available in waffle pack and wafer form; order as sl788 for inkless wafer form. bumped die available upon request. please contact serial eeprom marketing. at24c16a ordering information (1) ordering code package operation range at24c16a-10pu-2.7 (2) at24c16a-10pu-1.8 (2) at24c16an-10su-2.7 (2) at24c16an-10su-1.8 (2) at24c16a-10tu-2.7 (2) at24c16a-10tu-1.8 (2) at24c16ay1-10yu-1.8 (2) (not recommended for new design) at24c16ay6-10yh-1.8 (3) at24c16au2-10uu-1.8 (2) 8p3 8p3 8s1 8s1 8a2 8a2 8y1 8y6 8u2-1 lead-free/halogen-free/ industrial temperature ( ? 40 c to 85 c) at24c16a-w1.8-11 (3) die sale industrial temperature ( ? 40 c to 85 c) package type 8p3 8-pin, 0.300" wide, plastic dual inline package (pdip) 8s1 8-lead, 0.150" wide, plastic gull wing small outline (jedec soic) 8a2 8-lead, 0.170" wide, thin shrink small outline package (tssop) 8y1 8-lead, 4.90 mm x 3.00 mm body, dual footprin t, non-leaded, miniature array package (map) 8y6 8-lead, 2.00 x 3.00 mm body, 0.50 mm pitch, ultra thin mini-map, dual no lead package (dfn), (mlp 2x3 mm) 8u2-1 8-ball, die ball grid array package (dbga2) options ? 2.7 low voltage (2.7v to 5.5v) ? 1.8 low voltage (1.8v to 5.5v)
18 at24c01a/02/04/08a/16a 0180z?seepr?11/06 packaging information 8p3 ? pdip 2 3 25 orch a rd p a rkw a y sa n jo s e, ca 951 3 1 title drawing no. r rev. 8p3 , 8 -le a d, 0. 3 00" wide body, pl as tic d ua l in-line p a ck a ge (pdip) 01/09/02 8 p 3 b note s : 1. thi s dr a wing i s for gener a l inform a tion only; refer to jedec dr a wing m s -001, v a ri a tion ba, for a ddition a l inform a tion. 2. dimen s ion s a a nd l a re me asu red with the p a ck a ge s e a ted in jedec s e a ting pl a ne g au ge g s - 3 . 3 . d, d1 a nd e1 dimen s ion s do not incl u de mold fl as h or protr us ion s . mold fl as h or protr us ion s s h a ll not exceed 0.010 inch. 4. e a nd ea me asu red with the le a d s con s tr a ined to b e perpendic u l a r to d a t u m. 5. pointed or ro u nded le a d tip s a re preferred to e as e in s ertion. 6. b 2 a nd b3 m a xim u m dimen s ion s do not incl u de d a m ba r protr us ion s . d a m ba r protr us ion s s h a ll not exceed 0.010 (0.25 mm). common dimensions (unit of me asu re = inche s ) symbol min nom max note d d1 e e1 e l b 2 b a2 a 1 n ea c b3 4 plc s a ? ? 0.210 2 a2 0.115 0.1 3 0 0.195 b 0.014 0.01 8 0.022 5 b 2 0.045 0.060 0.070 6 b3 0.0 3 0 0.0 3 9 0.045 6 c 0.00 8 0.010 0.014 d 0. 3 55 0. 3 65 0.400 3 d1 0.005 ? ? 3 e 0. 3 00 0. 3 10 0. 3 25 4 e1 0.240 0.250 0.2 8 0 3 e 0.100 b s c ea 0. 3 00 b s c 4 l 0.115 0.1 3 0 0.150 2 top view s ide view end view
19 at24c01a/02/04/08a/16a 0180z?seepr?11/06 8s1 ? jedec soic 1150 e. cheyenne mtn. blvd. colorado springs, co 80906 title drawing no. r rev. note: 10/7/03 8s1 , 8-lead (0.150" wide body), plastic gull wing small outline (jedec soic) 8s1 b common dimensions (unit of measure = mm) symbol min nom max note a1 0.10 ? 0.25 these drawings are for general information only. refer to jedec drawing ms-012, variation aa for proper dimensions, tolerances, datums, etc. a 1.35 ? 1.75 b 0.31 ? 0.51 c 0.17 ? 0.25 d 4.80 ? 5.00 e1 3.81 ? 3.99 e 5.79 ? 6.20 e 1.27 bsc l 0.40 ? 1.27 ? 0? ? 8? ? top view end view side view e b d a a1 n e 1 c e1 l
20 at24c01a/02/04/08a/16a 0180z?seepr?11/06 8a2 ? tssop 2325 orchard parkway san jose, ca 95131 title drawing no. r rev. 5/30/02 common dimen s ion s (unit of measure = mm) s ymbol min nom max note d 2.90 3.00 3.10 2, 5 e 6.40 bsc e1 4.30 4.40 4.50 3, 5 a ? ? 1.20 a2 0.80 1.00 1.05 b 0.19 ? 0.30 4 e 0.65 bsc l 0.45 0.60 0.75 l1 1.00 ref 8 a2 , 8-lead, 4.4 mm body, plastic thin shrink small outline package (tssop) notes: 1. this drawing is for general information only. refer to jedec drawing mo-153, variation aa, for proper dimensions, tolerances, datums, etc. 2. dimension d does not include mold flash, protrusions or gate burrs. mold flash, protrusions and gate burrs shall not exceed 0.15 mm (0.006 in) per side. 3. dimension e1 does not include inter-lead flash or protrusions. inter-lead flash and protrusions shall not exceed 0.25 mm (0.010 in) per side. 4. dimension b does not include dambar protrusion. allowable dambar protrusion shall be 0.08 mm total in excess of the b dimension at maximum material condition. dambar cannot be located on the lower radius of the foot. minimum space between protrusion and adjacent lead is 0.07 mm. 5. dimension d and e1 to be determined at datum plane h. 8a2 b side view end view top view a2 a l l1 d 1 2 3 e1 n b pin 1 indicator this corner e e
21 at24c01a/02/04/08a/16a 0180z?seepr?11/06 8y1 ? map a ? ? 0.90 a1 0.00 ? 0.05 d 4.70 4.90 5.10 e 2. 8 0 3 .00 3 .20 d1 0. 8 5 1.00 1.15 e1 0. 8 5 1.00 1.15 b 0.25 0. 3 0 0. 3 5 e 0.65 typ l 0.50 0.60 0.70 pin 1 index area d e a a1 b 8 7 6 e 5 l d1 e1 pin 1 index area 1 2 3 4 a top view end view bottom view s ide view 2 3 25 orch a rd p a rkw a y sa n jo s e, ca 951 3 1 title drawing no. r rev. 8y1, 8 -le a d (4.90 x 3 .00 mm body) m s op arr a y p a ck a ge (map) y1 c 8 y1 2/2 8 /0 3 common dimensions (unit of me asu re = mm) symbol min nom max note
22 at24c01a/02/04/08a/16a 0180z?seepr?11/06 8y6 ? mini-map (mlp 2x3 mm) 2325 orchard parkway san jose, ca 95131 title drawing no. r rev. 8y6 , 8-lead 2.0 x 3.0 mm body, 0.50 mm pitch, utlra thin mini-map, dual no lead package (dfn) ,(mlp 2x3) c 8y6 8/26/05 notes: 1. this drawing is for general information only. refer to jedec drawing mo-229, for proper dimensions, tolerances, datums, etc. 2. dimension b applies to metallized terminal and is measured between 0.15 mm and 0.30 mm from the terminal tip. if the terminal has the optional radius on the other end of the terminal, the dimension should not be measured in that radius area. common dimensions (unit of measure = mm) symbol min nom max note d 2.00 bsc e 3.00 bsc d2 1.40 1.50 1.60 e2 - - 1.40 a - - 0.60 a1 0.0 0.02 0.05 a2 - - 0.55 a3 0.20 ref l 0.20 0.30 0.40 e 0.50 bsc b 0.20 0.25 0.30 2 a2 b (8x) pin 1 id pin 1 index area a1 a3 d e a l (8x) e (6x) 1.50 ref. d2 e2
23 at24c01a/02/04/08a/16a 0180z?seepr?11/06 5ts1 ? sot23 1150 e. cheyenne mtn. blvd. colorado springs, co 80906 title drawing no. r rev. po5ts1 a 6/25/03 common dimensions (unit of measure = mm) symbol min nom max note 5ts1, 5-lead, 1.60 mm body, plastic thin shrink small outline package (shrink sot) a ? ? 1.10 a1 0.00 ? 0.10 a2 0.70 0.90 1.00 c 0.08 ? 0.20 4 d 2.90 bsc 2, 3 e 2.80 bsc 2, 3 e1 1.60 bsc 2, 3 l1 0.60 ref e 0.95 bsc e1 1.90 bsc b 0.30 ? 0.50 4, 5 notes: 1. this drawing is for general information only. refer to jedec drawing mo-193, variation ab, for additional information. 2. dimension d does not include mold flash, protrusions, or gate burrs. mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per end. dimension e1 does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.15 mm per side. 3. the package top may be smaller than the package bottom. dimensions d and e1 are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but including any mismatch between the top and bottom of the plastic body. 4. these dimensions apply to the flat section of the lead between 0.08 mm and 0.15 mm from the lead tip. 5. dimension "b" does not include dambar protrusion. allowable dambar protrusion shall be 0.08 mm total in excess of the "b" dimension at maximum material condition. the dambar cannot be located on the lower radius of the foot. minimum space between protrusion and an adjacent lead shall not be less than 0.07 mm. 5 4 2 l1 l c end view c a a2 a1 b e seating plane d side view e1 e1 3 1 top view e
24 at24c01a/02/04/08a/16a 0180z?seepr?11/06 8u2 ? dbga2 1150 e. cheyenne mtn. blvd. colorado springs, co 80906 title drawing no. r rev. 8u2 , 8-ball 0.75 pitch, die ball grid array package (dbga) at24c512 (at19870) 02/04/02 8u2 a common dimensions (unit of measure = mm) symbol min nom max note d 5.10 d1 1.43 typ e 3.25 e1 1.25 typ e 0.75 typ d 0.75 typ a 0.90 ref a1 0.49 0.52 0.55 a2 0.35 0.38 0.41 ? b 0.47 0.50 0.53 d e d e a2 a 4 3 2 1 8 7 6 5 e1 d1 a1 - z - z m 8 0 . 0 y x z m 5 1 . 0 ?b # # # # pin 1 mark this corner notes: 1. these drawings are for general information only. no jedec drawing to refer to for additional information. 2. dimension is measured at the maximum solder ball diameter, parallel to primary datum z. top view side view bottom view
25 at24c01a/02/04/08a/16a 0180z?seepr?11/06 8u3-1 ? dbga2 1150 e. cheyenne mtn. blvd. color a do s pring s , co 8 0906 title drawing no. r rev. po 8 u 3 -1 a 6/24/0 3 common dimensions (unit of me asu re = mm) symbol min nom max note 8u3-1, 8 - ba ll, 1.50 x 2.00 mm body, 0.50 mm pitch, s m a ll die b a ll grid arr a y p a ck a ge (dbga2) a 0.71 0. 8 1 0.91 a1 0.10 0.15 0.20 a2 0.40 0.45 0.50 b 0.20 0.25 0. 3 0 d 1.50 b s c e 2.00 b s c e 0.50 b s c e1 0.25 ref d 1.00 b s c d1 0.25 ref 1. dimen s ion ? b? i s me asu red a t the m a xim u m s older ba ll di a meter. thi s dr a wing i s for gener a l inform a tion only. bottom view 8 s older ball s b d e top view pin 1 ball pad corner a s ide view a 2 a 1 4 5 pin 1 ball pad corner 3 1 e 2 6 7 8 d (e1) (d1) 1.
printed on recycled paper. 0180z?seepr?11/06 disclaimer: the information in this document is provided in connection with atmel products. no license, expr ess or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of atmel products. except as set forth in atmel?s terms and condi- tions of sale located on atmel?s web site, atmel assumes no li ability whatsoever and disclaims any express, implied or statutor y warranty relating to its products including, but not limited to , the implied warranty of merchantability, fitness for a particu lar purpose, or non-infringement. in no event shall atmel be liable for any direct, indirect, conseq uential, punitive, special or i nciden- tal damages (including, without limitation, dam ages for loss of profits, business inte rruption, or loss of information) arising out of the use or inability to use this document, even if atmel has been advised of the possibility of such damages. atmel makes no representations or warranties with respect to the accuracy or comp leteness of the contents of th is document and reserves the rig ht to make changes to specifications and product descriptions at any time withou t notice. atmel does not make any commitm ent to update the information contained her ein. unless specifically provided otherwise, atmel products are not suitable for, and shall not be used in, automotive applications. atmel?s products are not int ended, authorized, or warranted for use as components in applications intended to support or sustain life. atmel corporation atmel operations 2325 orchard parkway san jose, ca 95131, usa tel: 1(408) 441-0311 fax: 1(408) 487-2600 regional headquarters europe atmel sarl route des arsenaux 41 case postale 80 ch-1705 fribourg switzerland tel: (41) 26-426-5555 fax: (41) 26-426-5500 asia room 1219 chinachem golden plaza 77 mody road tsimshatsui east kowloon hong kong tel: (852) 2721-9778 fax: (852) 2722-1369 japan 9f, tonetsu shinkawa bldg. 1-24-8 shinkawa chuo-ku, tokyo 104-0033 japan tel: (81) 3-3523-3551 fax: (81) 3-3523-7581 memory 2325 orchard parkway san jose, ca 95131, usa tel: 1(408) 441-0311 fax: 1(408) 436-4314 microcontrollers 2325 orchard parkway san jose, ca 95131, usa tel: 1(408) 441-0311 fax: 1(408) 436-4314 la chantrerie bp 70602 44306 nantes cedex 3, france tel: (33) 2-40-18-18-18 fax: (33) 2-40-18-19-60 asic/assp/smart cards zone industrielle 13106 rousset cedex, france tel: (33) 4-42-53-60-00 fax: (33) 4-42-53-60-01 1150 east cheyenne mtn. blvd. colorado springs, co 80906, usa tel: 1(719) 576-3300 fax: 1(719) 540-1759 scottish enterprise technology park maxwell building east kilbride g75 0qr, scotland tel: (44) 1355-803-000 fax: (44) 1355-242-743 rf/automotive theresienstrasse 2 postfach 3535 74025 heilbronn, germany tel: (49) 71-31-67-0 fax: (49) 71-31-67-2340 1150 east cheyenne mtn. blvd. colorado springs, co 80906, usa tel: 1(719) 576-3300 fax: 1(719) 540-1759 biometrics/imaging/hi-rel mpu/ high speed converters/rf datacom avenue de rochepleine bp 123 38521 saint-egreve cedex, france tel: (33) 4-76-58-30-00 fax: (33) 4-76-58-34-80 literature requests www.atmel.com/literature ? 2006 atmel corporation. all rights reserved. atmel ? , logo and combinations thereof, everywhere you are ? and others, are registered trade- marks or trademarks of atmel corporation or its subsidiari es. other terms and product names may be trademarks of others.

▲Up To Search▲

Price & Availability of 24C02N

	To Download 24C02N Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .